1. Field of the Invention
The present patent specification describes a method and system for program development supporting, and more particularly to a method and system for program development supporting capable of effectively facilitating comparing and verifying operations of two or more programs.
2. Discussion of the Background
Designing an integrated circuit of a semiconductor generally includes three major steps. In a first step, an algorithm of a circuit is described into a program by using a general-purposed programming language such as C-language, and the program prepared in this way is used to verify correctness of the algorithm. Then, in a second step, a circuit is described according to the algorithm by using a system design language such as SystemC. In a third step, a program written with the general-purposed programming language is verified with a program written with the system design language.
In the process of designing circuitry, it often happens that a program developed with the general-purposed programming language differs from a circuit (i.e., a program) written with the system design language. This is because the circuit design involves an error. If two resultant programs do not match, a cause of it is needed to be traced in the circuit.
To find an error, a function such as “printf” is often used to indicate a value of an internal variant A. The function “printf” is referred to as a character string output function in the C-language. This function “printf” is added into the program of the general-purposed programming language, and the program is executed. Also, in the program written by the system design language, a function similar to “printf” for representing a value of an internal variant A′ which is considered to take the same value as the internal variant A, and a logical simulation is executed. After that, the values of the internal variants A and A′ are visually compared to check whether they are equivalent to each other. Such an operation is conducted on several variants to find a portion in the circuit description where the error is generated. Then, the program of the system design language is corrected piece by piece to eventually obtain a correct program.